302 lines
6.9 KiB
C
302 lines
6.9 KiB
C
/*
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* pbi.c - Parallel bus emulation
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*
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* Copyright (C) 2002 Jason Duerstock <jason@cluephone.com>
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* Copyright (C) 2007-2008 Perry McFarlane
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* Copyright (C) 2002-2008 Atari800 development team (see DOC/CREDITS)
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*
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* This file is part of the Atari800 emulator project which emulates
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* the Atari 400, 800, 800XL, 130XE, and 5200 8-bit computers.
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*
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* Atari800 is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Atari800 is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Atari800; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "atari.h"
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#include "pbi.h"
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#include "memory.h"
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#include "pia.h"
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#include "cpu.h"
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#include "log.h"
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#include "util.h"
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#include "statesav.h"
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#include <stdlib.h>
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#ifdef PBI_MIO
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#include "pbi_mio.h"
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#endif
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#ifdef PBI_BB
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#include "pbi_bb.h"
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#endif
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#ifdef PBI_XLD
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#include "pbi_xld.h"
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#endif
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#ifdef PBI_PROTO80
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#include "pbi_proto80.h"
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#endif
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/* stores the current state of the D1FF register, real hardware has 1
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* bit per device, the bits are on the devices themselves */
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static UBYTE D1FF_LATCH = 0;
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/* 1400XL/1450XLD and 1090 have ram here */
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int PBI_D6D7ram = FALSE;
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/* So far as is currently implemented: PBI_IRQ can be generated by the 1400/1450 Votrax and the Black Box button */
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/* Each emulated PBI device will set a bit in this variable to indicate IRQ status */
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/* The actual hardware has only one common line. The device driver rom has to
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* figure it out*/
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int PBI_IRQ = 0;
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#ifdef PBI_DEBUG
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#define D(a) a
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#else
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#define D(a) do{}while(0)
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#endif
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int PBI_Initialise(int *argc, char *argv[])
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{
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return TRUE
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#ifdef PBI_XLD
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&& PBI_XLD_Initialise(argc, argv)
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#endif
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#ifdef PBI_BB
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&& PBI_BB_Initialise(argc, argv)
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#endif
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#ifdef PBI_MIO
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&& PBI_MIO_Initialise(argc, argv)
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#endif
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#ifdef PBI_PROTO80
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&& PBI_PROTO80_Initialise(argc, argv)
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#endif
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;
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}
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int PBI_ReadConfig(char *string, char *ptr)
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{
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if (0) {
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}
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#ifdef PBI_XLD
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else if (PBI_XLD_ReadConfig(string, ptr)) {
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}
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#endif
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#ifdef PBI_MIO
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else if (PBI_MIO_ReadConfig(string, ptr)) {
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}
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#endif
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#ifdef PBI_BB
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else if (PBI_BB_ReadConfig(string, ptr)) {
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}
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#endif
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#ifdef PBI_PROTO80
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else if (PBI_PROTO80_ReadConfig(string, ptr)) {
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}
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#endif
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else return FALSE; /* no match */
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return TRUE; /* matched something */
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}
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void PBI_WriteConfig(FILE *fp)
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{
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#ifdef PBI_MIO
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PBI_MIO_WriteConfig(fp);
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#endif
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#ifdef PBI_BB
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PBI_BB_WriteConfig(fp);
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#endif
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#ifdef PBI_XLD
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PBI_XLD_WriteConfig(fp);
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#endif
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#ifdef PBI_PROTO80
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PBI_PROTO80_WriteConfig(fp);
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#endif
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}
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void PBI_Reset(void)
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{
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/* Reset all PBI ROMs */
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PBI_D1PutByte(0xd1ff, 0);
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#ifdef PBI_XLD
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if (PBI_XLD_enabled) PBI_XLD_Reset();
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#endif
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PBI_IRQ = 0;
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}
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UBYTE PBI_D1GetByte(UWORD addr)
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{
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int result = 0xff;
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/* MIO and BB do not follow the spec, they take over the bus: */
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#ifdef PBI_MIO
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if (PBI_MIO_enabled) return PBI_MIO_D1GetByte(addr);
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#endif
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#ifdef PBI_BB
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if (PBI_BB_enabled) return PBI_BB_D1GetByte(addr);
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#endif
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/* Remaining PBI devices cooperate, following spec */
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#ifdef PBI_XLD
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if (PBI_XLD_enabled) result = PBI_XLD_D1GetByte(addr);
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#endif
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#ifdef PBI_PROTO80
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if (result == PBI_NOT_HANDLED && PBI_PROTO80_enabled) result = PBI_PROTO80_D1GetByte(addr);
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#endif
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if(result != PBI_NOT_HANDLED) return (UBYTE)result;
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/* Each bit of D1FF is set by one of the 8 PBI devices to signal IRQ */
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/* The XLD devices have been combined into a single handler */
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if (addr == 0xd1ff) {
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/* D1FF IRQ status: */
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result = 0;
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#ifdef PBI_XLD
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if (PBI_XLD_enabled) result |= PBI_XLD_D1ffGetByte();
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#endif
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/* add more devices here... */
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return result;
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}
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/* addr was not handled: */
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D(printf("PBI_GetByte:%4x:%2x PC:%4x IRQ:%d\n",addr,result,CPU_regPC,IRQ));
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return result; /* 0xff */
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}
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void PBI_D1PutByte(UWORD addr, UBYTE byte)
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{
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static int fp_active = TRUE;
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#ifdef PBI_MIO
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if (PBI_MIO_enabled) {
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PBI_MIO_D1PutByte(addr, byte);
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return;
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}
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#endif
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#ifdef PBI_BB
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if (PBI_BB_enabled) {
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PBI_BB_D1PutByte(addr, byte);
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return;
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}
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#endif
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/* Remaining PBI devices cooperate, following spec */
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if (addr != 0xd1ff) {
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D(printf("PBI_PutByte:%4x <- %2x\n", addr, byte));
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#ifdef PBI_XLD
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if (PBI_XLD_enabled) PBI_XLD_D1PutByte(addr, byte);
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#endif
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#ifdef PBI_PROTO_80
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if (PBI_PROTO80_enabled) PBI_PROTO80_D1PutByte(addr, byte);
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#endif
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/* add more devices here... */
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}
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else if (addr == 0xd1ff) {
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/* D1FF pbi rom bank select */
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D(printf("D1FF write:%x\n", byte));
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if (D1FF_LATCH != byte) {
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/* if it's not valid, ignore it */
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if (byte != 0 && byte != 1 && byte != 2 && byte != 4 && byte != 8 && byte != 0x10 && byte !=0x20 && byte != 0x40 && byte != 0x80){
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D(printf("*****INVALID d1ff write:%2x********\n",byte));
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return;
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}
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/* otherwise, update the latch */
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D1FF_LATCH = byte;
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#ifdef PBI_XLD
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if (PBI_XLD_enabled && PBI_XLD_D1ffPutByte(byte) != PBI_NOT_HANDLED) {
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/* handled */
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fp_active = FALSE;
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return;
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}
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#endif
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#ifdef PBI_PROTO80
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if (PBI_PROTO80_enabled && PBI_PROTO80_D1ffPutByte(byte) != PBI_NOT_HANDLED) {
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/* handled */
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fp_active = FALSE;
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return;
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}
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#endif
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/* add more devices here... */
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/* reactivate the floating point rom */
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if (!fp_active) {
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memcpy(MEMORY_mem + 0xd800, MEMORY_os + 0x1800, 0x800);
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D(printf("Floating point rom activated\n"));
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fp_active = TRUE;
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}
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}
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}
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}
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/* $D6xx */
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UBYTE PBI_D6GetByte(UWORD addr)
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{
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#ifdef PBI_MIO
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if (PBI_MIO_enabled) return PBI_MIO_D6GetByte(addr);
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#endif
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#ifdef PBI_BB
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if(PBI_BB_enabled) return PBI_BB_D6GetByte(addr);
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#endif
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/* XLD/1090 has ram here */
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if (PBI_D6D7ram) return MEMORY_mem[addr];
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else return 0xff;
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}
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/* $D6xx */
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void PBI_D6PutByte(UWORD addr, UBYTE byte)
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{
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#ifdef PBI_MIO
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if (PBI_MIO_enabled) {
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PBI_MIO_D6PutByte(addr,byte);
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return;
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}
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#endif
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#ifdef PBI_BB
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if(PBI_BB_enabled) {
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PBI_BB_D6PutByte(addr,byte);
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return;
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}
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#endif
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/* XLD/1090 has ram here */
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if (PBI_D6D7ram) MEMORY_mem[addr]=byte;
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}
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/* read page $D7xx */
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/* XLD/1090 has ram here */
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UBYTE PBI_D7GetByte(UWORD addr)
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{
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D(printf("PBI_D7GetByte:%4x\n",addr));
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if (PBI_D6D7ram) return MEMORY_mem[addr];
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else return 0xff;
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}
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/* write page $D7xx */
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/* XLD/1090 has ram here */
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void PBI_D7PutByte(UWORD addr, UBYTE byte)
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{
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D(printf("PBI_D7PutByte:%4x <- %2x\n",addr,byte));
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if (PBI_D6D7ram) MEMORY_mem[addr]=byte;
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}
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#ifndef BASIC
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void PBI_StateSave(void)
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{
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StateSav_SaveUBYTE(&D1FF_LATCH, 1);
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StateSav_SaveINT(&PBI_D6D7ram, 1);
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StateSav_SaveINT(&PBI_IRQ, 1);
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}
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void PBI_StateRead(void)
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{
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StateSav_ReadUBYTE(&D1FF_LATCH, 1);
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StateSav_ReadINT(&PBI_D6D7ram, 1);
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StateSav_ReadINT(&PBI_IRQ, 1);
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}
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#endif /* #ifndef BASIC */
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/*
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vim:ts=4:sw=4:
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*/
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